Adventures in PC Emulation

My emulator has a bug.  I've encountered and fixed countless bugs over the course of development, but this one has haunted me since I was first able to boot the IBM 5160 BIOS, and still isn't squashed. I thought it might be interesting to blog my process of finally squashing this bug once and for all - as I start to write this blog entry, I haven't yet. So we'll see if I am successful! The bug is that while using the IBM 5160 BIOS, if you hit a key during boot, the system will halt. Not good. Many error conditions in the BIOS POST process will produce beeps or error codes and carry on, but I suppose IBM warranted specific, early errors to be so severe that there was no point in continuing. Background Before any of the following will make sense, I'll need to explain a little bit of the two chips involved here, the PPI and the PIC. The PIC The PIC, or the Intel 8259A Programmable Interrupt Controller, manages interrupts on the IBM PC. It has 8 interrupt request lines,...

In the emulation world, there are a few different ways to determine if your emulator is accurate.  The traditional way has been through the use of test ROMs: ROMs that either act as cartridges for cartridge-based console systems, or replacement system ROMs that execute from the system bootstrap. These ROMs will typically run a specified suite of tests and output pass/fail status either via the screen or some IO port.   The 8088 doesn't have a dedicated test ROM (yet), but test ROMS exist for the 80186 and 80386 processors .  Another more recent method is to use a CPU instruction test suite, typically comprised of thousands of JSON files, each a record of a single instruction's execution including cycle states and bus accesses. Each JSON file provides the information to set up the CPU state for the test, and the final resulting state for a correct execution of the instruction. A collection of such tests has been compiled by Thomas Harte, available here .  But aga...

In order to accurately emulate cycle-counted demo effects such as the Kefrens bars effect in 8088MPH, or the end credits in Area 5150, there are essentially four prerequisites: Cycle-accurate 8088 CPU emulation including processor instruction queue emulation Cycle-accurate CGA CRTC emulation Accurate DMA emulation for DRAM refresh Accurate CGA wait state emulation Item #3 was covered in my last blog entry . This article will discuss the last item, CGA wait state emulation. ISA Peripherals and I/O CH RDY The number of wait states that the CPU inserts on each access to the CGA memory depends on the amount of time that the CGA card suppresses the I/O CH RDY signal, which is on ISA bus pin A10.  ISA bus pinout, courtesy Wikipedia This signal reaches the motherboard and is passed through miscellaneous TTL logic (on Sheet 2 of the Technical Reference) to eventually connect to the RDY pin on the 8284 clock generator, which in turn produces the READY signal to the CPU. When READY is low du...